The present invention relates generally to inspection of thin film transistor (TFT) arrays, and more specifically to inspection of TFT arrays that have integrated circuit (IC) drivers.
In a finished liquid crystal flat panel, a thin layer of liquid crystal (LC) material is disposed between two sheets of glass. On one sheet of glass, a two-dimensional array of electrodes has been patterned. Each electrode may be on the order of 100 microns in size and can have a unique voltage applied to it via multiplexing transistors positioned along the edge of the panel. In a finished product, the electric field created by each individual electrode couples into the LC material and modulates the amount of transmitted light in that pixelated region. This effect when taken in aggregate across the entire two dimensional array results in a visible image on the flat-panel.
A significant part of the manufacturing cost associated with LCD panels occurs when the LC material is injected between the upper and lower glass plates. It is therefore important to identify and correct any image quality problems prior to this manufacturing step. The problem with inspecting LCD panels prior to deposition of the liquid crystal (LC) material is that without LC material, there is no visible image available to inspect. Prior to deposition of LC material, the only signal present at a given pixel is the electric field generated by the voltage on that pixel, if driven by an external electrical source. Means of testing such panel arrays typically take advantage of an electrical property of the pixel (such as electrical field or pixel voltage as a function of changing drive voltages on the transistor gates or data lines). Array testers devised by Photon Dynamics use a voltage image optical system (VIOS), as described by U.S. Pat. No. 4,983,911, for example. Array testers sold by Applied Komatsu use an electron beam and imaging system to detect defects. Both these array test machines require a means to electrically drive the sample in conjunction with their respective detection methodologies.
U.S. Pat. No. 5,081,687, issued to Henley et al. and incorporated herein by reference in its entirety, describes an array test method according to which a pattern of electrical driving signals are applied to the panel under test. Referring to FIG. 1, a typical active matrix LCD panel segment 10 is shown as including, an array of pixels 12. Each pixel 12 is activated by addressing simultaneously an appropriate drive line 14 and gate line 16. A drive element 18 is associated with each pixel. The drive lines 14, gate lines 16, pixels 12 and pixel drive elements 18 are deposited on a clear glass substrate by a lithographic or other processes. Odd numbered gate lines may be addressed simultaneously via shorting bar 30, which joins every other gate line 16. Even numbered gate lines may be addressed by a second shorting bar (not shown). Similarly, odd numbered data lines may be addressed via shorting bar 28, which joins every other data line 14. Even numbered data lines may be addressed by a second shorting bar (not shown). Different drive patterns may be applied to the gate and data lines to determine which pixels may be defective.
Typically, electrical drive circuitry of the final display panel is added during manufacturing and assembly of the panel into its final form (for example, computer monitor, cell phone display, television, etc.) FIG. 2 shows a panel 200 that is in electrical communication with printed circuit board 204 using a multitude of connectors 204. Panel 200 of FIG. 2 is assumed to include the circuitry shown in FIG. 1. A gate driver integrated circuit (IC) (not shown) is mounted on printed circuit board 204 which is then brought into electrical contact with panel 200 for driving the pixel gate lines.
Recently, however, with the increased application of amorphous silicon material and associated processes and designs, integrated circuit (IC) gate drivers are being formed on the panel, as shown in simplified FIG. 3. See for example Kim et al, “High-Resolution Integrated a-Si Row Drivers,” SID 05 Digest, page 939; Lebrun et al “Design of Integrated Drivers with Amorphous Silicon TFTs for Small Displays, Basic Concepts” SID 05 Digest, page 950.